Parallel architectures for image processing

Electronics and Communication Engineering Journal

Volumn 10, Issue 3, 1998, Pages 139-151

  Downton, A ^a,b,c,d   Crookes, D ^c,e,f  

^a UNIVERSITY OF SOUTHAMPTON   (United Kingdom)

^b UNIVERSITY OF ESSEX   (United Kingdom)

^c IEE ^*

^d IEE Professional Group E4

^e QUEEN'S UNIVERSITY BELFAST   (United Kingdom)

^f High Perf Image Proc Res Group

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; PARALLEL PROCESSING SYSTEMS; PATTERN RECOGNITION; SOFTWARE ENGINEERING;

HANDWRITTEN POSTCODE RECOGNITION;

IMAGE PROCESSING;

EID: 0032093318     PISSN: 09540695     EISSN: None     Source Type: Journal    
DOI: 10.1049/ecej:19980307     Document Type: Article

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