Signature analysis for analog and mixed-signal circuit test response compaction

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 17, Issue 6, 1998, Pages 540-546

  Nagi, Naveena ^a   Chatterjee, Abhijit ^a   Yoon, Heebyung ^a   Abraham, Jacob A ^a  

^a UNIVERSITY OF TEXAS AT AUSTIN   (United States)

Author keywords

Aliasing; False rejection; Integrators; Mixed signal circuits; Signature analysis

Indexed keywords

INTEGRATING CIRCUITS; PROBABILITY; SIGNAL ENCODING; SIGNAL PROCESSING; TESTING;

SIGNATURE ANALYSIS;

DIGITAL INTEGRATED CIRCUITS;

EID: 0032091929     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.703834     Document Type: Article

References (8)

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