Failure analysis of wafer using backside OBIC method

Microelectronics Reliability

Volumn 38, Issue 6-8, 1998, Pages 993-996

  Ito, Seigo ^a   Monma, Hideo ^a  

^a FUJITSU LABORATORIES LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; FAILURE ANALYSIS; HELIUM NEON LASERS; LSI CIRCUITS; SILICON WAFERS;

OPTICAL BEAM INDUCED CURRENT (OBIC) METHODS;

INTEGRATED CIRCUIT TESTING;

EID: 0032083949     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0026-2714(98)00089-4     Document Type: Article

References (4)

1. T. Shiragasawa et al. 64Kbit full CMOS RAM using a laser scanner. IRPS, pp.63-68, 1984.
2. K. Haraguchi Microscopic OBIC Measurements and their Applications. IMTC, pp.639-699, 1994.
3. T. Ishii et al. Failure Analysis of ULSI with Photo emission from Backside of the chip. LSI Testing Symposium in Japan pp.221-226, 1995.
4. K. Ueda Backside OBIC Scanner. LSI Testing Symposium in Japan, pp. 164-169, 1996.