The effect of copper contamination on field overlap edges and perimeter junction leakage current

IEEE Transactions on Semiconductor Manufacturing

Volumn 11, Issue 2, 1998, Pages 232-238

  Vermeire, Bert ^b   Lee, Lichyn ^b   Parks, Harold G ^a,b  

^a IEEE   (United States)

^b University of Arizona   (United States)

Author keywords

Copper contamination; Gate oxide yield; Junction leakage; Silicon

Indexed keywords

CONTAMINATION; COPPER; GATES (TRANSISTOR); LEAKAGE CURRENTS; SEMICONDUCTING SILICON; SEMICONDUCTOR JUNCTIONS;

COPPER CONTAMINATION; FIELD OVERLAP EDGES; GATE OXIDE YIELDS;

MOS DEVICES;

EID: 0032074203     PISSN: 08946507     EISSN: None     Source Type: Journal    
DOI: 10.1109/66.670169     Document Type: Article

References (18)

1. P. S. D. Lin, R. B. Marcus, and T. T. Sheng, "Leakage and breakdown in thin oxide capacitors - Correlation with decorated stacking faults," J. Electrochem. Soc., vol. 130, no. 9, pp. 1878-1883, Sept. 1983.
2. 2-Si interface," in Microscopy of Semiconducting Materials 1987, A. G. Cullis and P. D. Augustus, Eds., Inst. Phys., 1987, pp. 463-468.
3. H. Wendt, H. Cerva, V. Lehmann, and W. Pamler, "Impact of copper contamination on the quality of silicon oxides," J. Appl. Phys., vol. 65, no. 6, pp. 2402-2405, Mar. 1989.
4. K. Hiramoto, M. Sano, S. Sadamitsu, and N. Fujino, "Degradation of gate oxide integrity by metal impurities," Jpn. J. Appl. Phys., vol. 28, no. 12, pp. L2109-L2111, Dec. 1989.
5. S. Verhaverbeke, M. Meuris, P. W. Mertens, M. M. Heyns, A. Philipossian, D. Gräf, and A. Schnegg, "The effect of metallic impurities on the dielectric breakdown of oxides and some new ways of avoiding them," in IEDM Tech. Dig.,1991, pp. 71-74.
6. R. N. Hall and J. H. Racette, "Diffusion and solubility of copper in extrinsic and intrinsic germanium, silicon, and gallium arsenide," J. Appl. Phys., vol. 35, no. 2, pp. 379-397, Feb. 1964.
7. 2-Si interface," J. Electrochem. Soc., vol. 131, no. 12, pp. 2964-2969, Dec. 1984.
8. 2/Si interface," J. Appl. Phys., vol. 68, no. 7, pp. 3313-3316, Oct. 1990.
9. L. Zhong and F. Shimura, "Dependence of lifetime on surface concentration of copper and iron in silicon," Appl. Phys. Lett., vol. 61, no. 9, pp. 1078-1080, Aug. 1992.
10. L. Zhong and F. Shimura, "Substitutional diffusion of transition metal impurities in silicon," Jpn. J. Appl. Phys., vol. 32, no. 8B, pp. L1113-L116, Aug. 1993.
11. H. G. Parks, R. D. Schrimpf, B. Craigin, R. Jones, and P. Resnick, "Quantifying the impact of homogenous metal contamination using test structure metrology and device modeling," IEEE Trans. Semiconduct. Manufact., vol. 7, pp. 249-258, Aug. 1994.
12. K. K. Yoneshigi, H. G. Parks, S. Raghavan, J. B. Hiskey, and P. J. Resnick, "Deposition of copper from a buffered oxide etchant onto silicon wafers," J. Electrochem. Soc., vol. 142, no. 2, pp. 671-676, Feb. 1995.
13. I. Teerlinck, P. W. Mertens, H. F. Schmidt, M. Meuris, and M. M. Heyns, "Impact of the electrochemical properties of silicon wafer surfaces on copper outplating from HF soluctions," J. Electrochem. Soc., vol. 143, no. 10, pp. 3323-3327, Oct. 1996.
14. P. W. Mertens, B. Vermeire, M. Depas, M. Meuris, M. M. Heyns, and D. Graf, "Statistical analysis of gate oxide integrity test," presented at the 40th Tech. Meeting Inst. Environ. Sci., Chicago, IL, May 1-6, 1994.
15. S. K. Ghandi, VLSI Fabrication Principles. New York: Wiley, 1994, p. 270.
16. W. Bergholz, G. Zoth, F. Gelsdorf, and B. Kolbesen, "Metal contamination in ULSI technology," in Defects in Slicon II, W. M. Bullis, U. Gösele, and F. Shimura, Eds. Pennington, NJ: Electrochem. Soc., 1991, pp. 21-39.
17. S. M. Sze, Physics of Semiconductor Devices. New York: Wiley, 1981, p. 403.
18. J. R. Schmid, H. G. Parks, R. Craigin, and R. D. Schrimpf, "Estimating the effect of contamination-induced leakage current in view of DRAM architectural trends," in Proc. IEEE Advanced Semiconductor Manufacturing Convf. Workshop 1994, 1994, pp. 96-105.