New architectures for m4r shape coding

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 45, Issue 5, 1998, Pages 556-562

  Stroming, James W ^a,b   Kang, Yi ^a,b   Kang, S M ^a,b   Huang, Thomas S ^a,b  

^a University of Illinois at Urbana Champaign   (United States)

^b UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

Author keywords

Architecture; Coding; MMR; MPE; Real time; Shape; Video compression; VLSI

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; DECODING; IMAGE COMPRESSION; PIPELINE PROCESSING SYSTEMS; REAL TIME SYSTEMS; VLSI CIRCUITS;

SHAPE CODING;

IMAGE CODING;

EID: 0032072769     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.673637     Document Type: Article

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