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Volumn 17, Issue 5, 1998, Pages 400-405

Model-Adaptable MOSFET Parameter-Extraction Method Using an Intermediate Model

Author keywords

Device modeling; Intermediate model; MOSFET; Numerical optimization; Parameter extraction

Indexed keywords

COMPUTER SIMULATION; MATHEMATICAL TRANSFORMATIONS; MOSFET DEVICES; OPTIMIZATION;

EID: 0032066595     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.703924     Document Type: Article
Times cited : (8)

References (10)
  • 3
    • 0025254950 scopus 로고
    • A parallel measurement syste for the extraction of level 3 SPICE parameters
    • Mar.
    • A. A. Walker and K. O. Jeppson, "A parallel measurement syste for the extraction of level 3 SPICE parameters," in Proc. Int. Conf Microelectronic Test Structures, Mar. 1990, pp. 129-134.
    • (1990) Proc. Int. Conf Microelectronic Test Structures , pp. 129-134
    • Walker, A.A.1    Jeppson, K.O.2
  • 4
    • 0023401686 scopus 로고
    • BSIM: Berkele short-channel IGFET model for MOS transistors
    • Aug.
    • B. J. Sheu, D. L. Sharfetter, P. K. Ko, and M. C. Jeng, "BSIM: Berkele short-channel IGFET model for MOS transistors," IEEE J. Solid-Stat Circuits, vol. SSC-22, pp. 558-566, Aug. 1987.
    • (1987) IEEE J. Solid-Stat Circuits , vol.SSC-22 , pp. 558-566
    • Sheu, B.J.1    Sharfetter, D.L.2    Ko, P.K.3    Jeng, M.C.4
  • 7
    • 0003984121 scopus 로고
    • Meta-Software, Inc., Campbell, CA
    • HSPICE User's Manual, Meta-Software, Inc., Campbell, CA, 1992.
    • (1992) HSPICE User's Manual
  • 8
    • 0022693437 scopus 로고
    • First-order parameter extraction on enhancement silicon MOS transistors
    • Apr.
    • M. F. Hammer and B. Sc, "First-order parameter extraction on enhancement silicon MOS transistors," Proc. Inst. Elect. Eng., vol. 133, pt. I, pp. 49-54, Apr. 1986.
    • (1986) Proc. Inst. Elect. Eng. , vol.133 , Issue.1 PT , pp. 49-54
    • Hammer, M.F.1    Sc, B.2
  • 9
    • 0027189092 scopus 로고
    • A system for analog circuit design that stores and re-uses design procedures
    • May
    • T. Morie, H. Onodera, and K. Tamaru, "A system for analog circuit design that stores and re-uses design procedures," in Proc. CICC'93, May 1993, pp. 13.4.1-13.4.4.
    • (1993) Proc. CICC'93 , pp. 1341-1344
    • Morie, T.1    Onodera, H.2    Tamaru, K.3
  • 10
    • 0023382743 scopus 로고
    • Improved simulation of p- And nchannel MOSFET's using an enhanced SPICE MOS3 model
    • July
    • S. L. Wong and C. A. T. Salama, "Improved simulation of p- and nchannel MOSFET's using an enhanced SPICE MOS3 model," IEEE Trans. Computer-Aided Design, vol. CAD-6, pp. 586-591, July 1987.
    • (1987) IEEE Trans. Computer-Aided Design , vol.CAD-6 , pp. 586-591
    • Wong, S.L.1    Salama, C.A.T.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.