Time-domain fault diagnosis of analogue circuits in the presence of noise

IEE Proceedings: Circuits, Devices and Systems

Volumn 145, Issue 2-5, 1998, Pages 125-131

  Brygilewicz, V ^a   Wojciechowski, J ^a  

^a WARSAW UNIVERSITY OF TECHNOLOGY   (Poland)

Author keywords

Algorithms; Analogue circuits; Multiple fault diagnosis; Noise

Indexed keywords

ADAPTIVE ALGORITHMS; COMPUTER SIMULATION; FAILURE ANALYSIS; LEAST SQUARES APPROXIMATIONS; SPURIOUS SIGNAL NOISE; TIME DOMAIN ANALYSIS;

ANALOG CIRCUITS;

ELECTRIC NETWORK ANALYSIS;

EID: 0032050277     PISSN: 13502409     EISSN: None     Source Type: Journal    
DOI: 10.1049/ip-cds:19981744     Document Type: Article

References (17)

1. HUERTAS, J.L.: 'Test and design for testability of analog and mixed-signal integrated circuits: theoretical basis and pragmatical approaches'. Proceedings of 1993 European conference on Circuit theory and design ECCTD'93, Davos, 1993, pp. 77-156
2. VISVANATHAN, V., and SANGIOVANNI-VINCENTELLI, A.: 'Diagnosability of nonlinear circuits and systems', IEEE Trans. Circuits Syst., 1981, CAS-28, pp. 1093-1102
3. SAEKS, R., SANGIOVANNI-VINCENTELLI, A., and VISVANATHAN, V.: 'Diagnosability of nonlinear circuits and systems-Part II: dynamical systems', IEEE Trans. Circuits Syst., 1981, CAS-28, pp. 1103-1108
4. FLECHA, L., and DECARLO, R.: 'Time domain tableau approach to the fault diagnosis of analog nonlinear circuits',=/Proceedings of IEEE International Symposium CaS, Newport Beach, 1984, pp. 828-830
5. SEN, N., and SAEKS, R.: 'Fault diagnosis for linear systems via multifrequency measurements', IEEE Trans. Circuits Syst., 1979, CAS-26, pp. 457-465
6. NAVID, N., and WILSON, A.N.: 'A theory and an algorithm for analog circuit fault diagnosis', IEEE Trans. Circuits Syst., 1979, CAS-26, pp. 440-457
7. HAMIDA, M., and KAMINSKA, B.: 'Multiple fault analog circuit testing by sensitivity analysis', J. Electron. Test.: Theory Appl., 1993, 4, pp. 331-344
8. WILLIAMS, R., and HAWKINS, C.: 'Errors in testing',International Test Conference, Washington, 1990, pp. 1018-1027
9. DAI, H., and SOUDERS, T.: 'Time-domain testing strategies and fault diagnosis for analog systems', IEEE Trans. Inst. Meas., 1990, IM-39, pp. 157-162
10. STARZYK, J., and DAI, H.: 'A decomposition approach for testing large analog networks', J. Electron. Test.: Theory Appl., 1992, 2, pp. 181-195
11. STENBAKKEN, G., and SOUDERS, T.: 'Test point selection and testability measures via QR factorization of linear models', IEEE Trans. Inst. Meas., 1987, IM-36, pp. 406-410
12. BRYGILEWICZ, V., and WOJCIECHOWSKI, J.: 'Parameter identification in dynamic circuits based on post-production testing'. Proceedings of XVII national conference on Circuit theory and electronic networks, Wroclaw-Polanica, Poland, 1994, pp. 555-560
13. BRYGILEWICZ, V., and WOJCIECHOWSKI, J.: 'Fault diagnosis of dynamic circuits in the presence of measurement noise'. Proceedings of 1995 European conference on Circuit theory and design, Istanbul, 1995, pp. 291-294
14. BLAGITKO, B., BRYGILEWICZ, V., and MARTYNUK, P.: 'Powyszenie bystrodejstwija MP sistemy dla eksperimentalnogo opredelenia wremennyh i czastotnyh charakteristik elektronnyh cepej', Kontrolno-izmeritelnaja tehnika, 1988, (44), pp. 104-106 (in Russian)
15. VLACH, J., and SINGHAL, K.: 'Computer methods for circuit analysis and design' (Van Nostrand, Reinhold, New York, 1983)
16. BRAYTON, R., and SPENCE, R.: 'Sensitivity and optimization' (Elsevier, Amsterdam, 1980)
17. TIKHONOV, A., and ARSENIN, V.: 'Methods for solving incorrect tasks' (Nauka, Moscow, 1979)