A new symbolic method for analog circuit testability evaluation

IEEE Transactions on Instrumentation and Measurement

Volumn 47, Issue 2, 1998, Pages 554-565

  Fedi, Giulio ^a,b   Luchetta, Antonio ^a,c   Manetti, Stefano ^a,b   Piccirilli, Maria Christina ^b  

^a IEEE   (Italy)

^b UNIVERSITY OF FLORENCE   (Italy)

^c UNIVERSITY OF BASILICATA   (Italy)

Author keywords

Analog circuits; Analog system fault diagnosis; Analog system testing; Circuit testing; Fault diagnosis; Fault location

Indexed keywords

ALGORITHMS; COMPUTER SIMULATION; ELECTRIC FAULT LOCATION; OPTIMIZATION;

ANALOG CIRCUITS; ANALOG SYSTEM FAULT DIAGNOSIS;

LINEAR NETWORK ANALYSIS;

EID: 0032035532     PISSN: 00189456     EISSN: None     Source Type: Journal    
DOI: 10.1109/19.744205     Document Type: Article

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