A low-power 170-MHz discrete-time analog FIR filter

IEEE Journal of Solid-State Circuits

Volumn 33, Issue 3, 1998, Pages 417-426

  Wang, Xiaodong ^a,b,c,d   Spencer, Richard R ^{a,b,e,f,g,h,i,j,k}  

^a IEEE   (United States)

^b University of California   (United States)

^c PEKING UNIVERSITY   (China)

^d UNIVERSITY OF CALIFORNIA   (United States)

^e SAN JOSE STATE UNIVERSITY   (United States)

^f STANFORD UNIVERSITY   (United States)

^g Radio Products Laboratory   (Turkey)

^h Electro Magnetic Filter Company

ⁱ Memorex Corporation   (United States)

^j Program Committe for the ISSCC

^k University of California ^*

more..

Author keywords

Analog FIR filter; Circular buffer architecture; Discrete time; Fixed pattern noise; Low power CMOS circuits

Indexed keywords

BUFFER CIRCUITS; CMOS INTEGRATED CIRCUITS; DIGITAL TO ANALOG CONVERSION; ELECTRIC LOSSES; INTEGRATED CIRCUIT LAYOUT; SPURIOUS SIGNAL NOISE;

FIXED PATTERN NOISE;

DIGITAL FILTERS;

EID: 0032027372     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.661207     Document Type: Article

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