A CORDIC processor for FFT computation and its implementation using gallium arsenide technology

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 6, Issue 1, 1998, Pages 18-30

  Sarmiento, Roberto ^a,b   Tobajas, Félix ^b   De Armas, Valentín ^b   Esper Chaín, Roberto ^b   López, José F ^a,b   Montiel Nelson, Juan A ^a,b   Núñez, Antonio ^b  

^a IEEE   (Spain)

^b UNIVERSITY OF LAS PALMAS DE GRAN CANARIA   (Spain)

Author keywords

Application specific integrated circuits (ASIC's); Carry save adders; COordinate Rotation DIgital Computer (CORDIC); Fast Fourier transform (FFT); Full custom; Gallium arsenide (GaAs) VLSI design; High performance systems

Indexed keywords

ADDERS; ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; DIGITAL SIGNAL PROCESSING; FAST FOURIER TRANSFORMS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; PIPELINE PROCESSING SYSTEMS; SEMICONDUCTING GALLIUM ARSENIDE; VLSI CIRCUITS;

COORDINATE ROTATION DIGITAL COMPUTER (CORDIC) ALGORITHM;

MICROPROCESSOR CHIPS;

EID: 0032026504     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/92.661241     Document Type: Article

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