Hierarchical partitioning algorithm for optimistic distributed simulation of DEVS models

Journal of Systems Architecture

Volumn 44, Issue 6-7, 1998, Pages 433-455

  Kim, Ki Hyung ^a   Kim, Tag Gon ^b   Park, Kyu Ho ^b  

^a Yeungnam University   (South Korea)

^b Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

DEVS formalism; Hierarchical simulation; Parallel distributed discrete event simulation; Partitioning mapping; Time Warp

Indexed keywords

COMPUTATION THEORY; DATA COMMUNICATION SYSTEMS; DISTRIBUTED COMPUTER SYSTEMS; MATHEMATICAL MODELS; PARALLEL ALGORITHMS;

COMPUTATIONAL LOADS; DISCRETE EVENT SYSTEM SPECIFICATION; HIERARCHICAL SIMULATION; PARTITIONING ALGORITHMS;

COMPUTER SIMULATION;

EID: 0032025675     PISSN: 13837621     EISSN: None     Source Type: Journal    
DOI: 10.1016/S1383-7621(97)00057-X     Document Type: Article

References (37)

1. D. Baezner, G. Lomow, B.W. Unger. Sim++: the transition to distributed simulation. In: Proceedings of the SCS Multiconference on Distributed Simulation, Simulation Series, 1990.
2. R. Bagrodia, Yu an Chen, V. Jha, N. Sonpar, Parallel gate-level circuit simulation on shared memory architectures, in: Proceedings of the 1995 Workshop on Parallel and Distributed Simulation, Lake Placid. New York, 1995, pp. 170-174.
3. S.H. Bokhari, Partitioning problems in parallel, pipelined, and distributed computing, IEEE Transactions on Computers 37 (1988) 48-57.
4. A. Boukerche, C. Tropper, A static partitioning and mapping algorithm for conservative parallel simulations, in: Proceedings of the 1994 Workshop on Parallel and Distributed Simulation, Edinburgh, Scotland, UK, 1994, pp. 164-172.
5. R.D. Chamberlain, C.D. Henderson, Evaluating the use of pre-simulation in VLSI circuit partitioning, in: Proceedings of the 8th Workshop on Parallel and Distributed Simulation, 1994, pp. 139-146.
6. P. Chawla, Assignment Strategies for Parallel Discrete Event Simulation of Digital Systems, Ph.D. Thesis, University of Cincinnati, 1994.
7. A.C. Chow, B.P. Zeigler, Parallel DEVS: A parallel, hierarchical, modular modeling formalism, in: Proceedings of the 1994 Winter Simulation Conference. Orlando, Florida, 1994.
8. A.C. Chow, B.P. Zeigler, D.H. Kim, Abstract simulator for the parallel DEVS formalism, in: AI, Simulation, and Planning in High Autonomy Systems, IEEE Computer Society Press, Gainesville, Florida, 1994.
9. A.I. Concepcion, A hierarchical computer architecture for distributed simulation, IEEE Transactions on Computers 38 (2) (1989) 311-319.
10. J. Cong, Z. Li, R. Bagrodia, Acyclic multi way partitioning of boolean networks, in: 31st ACM/IEEE Design Automation Conference, 1994, pp. 670-675.
11. C.M. Fiduccia, R.M. Mattheyses, A linear-time heuristic for improving network partitioning, in: Proceedings of the 19th Design Automation Conference, 1982, pp. 175-182.
12. R.M. Fujimoto, Optimistic approaches to parallel discrete event simulation. Transactions of the Society for Computer Simulation, 7 (2) (1990) 153-191.
13. R.M. Fujimoto, Parallel discrete event simulation, Communication ACM 33 (10) (1990) 33-53.
14. D.W. Glazer, C. Tropper, On process migration and load balancing in time warp, IEEE Transactions on Parallel and Distributed Systems, 4 (3) (1993) 318-327
15. E.K. Haddad, Partitioned load allocation for minimum parallel processing execution time, International Conference on Parallel Processing, 1989. pp. 192-199.
16. G.P. Hong, T.G. Kim, A frame work for verifying discrete event models within a devs-based system development methodology, Transactions of the Society for Computer Simulation International 13 (1) (1996) 19-34.
17. D.R. Jefferson, Virtual time, ACM Transactions on Programming Languages and Systems 7 (3) (1985) 404-425.
18. K.L. Kapp, T.C. Hartrum, T.S. Wailes, An improved cost function for static partitioning of parallel circuit simulations using a conservative synchronization protocol, in: Proceedings of the 1995 Workshop on Parallel and Distributed Simulation, Lake Placid, New York, July 1995 pp. 78-85.
19. B.W. Kernighan, S. Lin, An efficient heuristic procedure for partitioning graphs, Bell System Technical Journal 49 (1970) 291-307.
20. K.H. Kim, Distributed simulation methodology based on system theoretic formalism: an asynchronous approach, Ph.D Thesis, Korea Advanced Institute of Science and Technology, 1996.
21. K.H. Kim, T.G. Kim, K.H. Park, A concurrency preserving partitioning algorithm for parallel simulation of hierarchical, modular discrete event models, in: Proceedings of High Performance Computing Asia 1997, Seoul, Korea, 1997.
22. K.H.Kim, Y.R. Seong, T.G. Kim, K.H. Park, Distributed optimistic simulation of hierarchical DEVS models, in: Proceedings of the 1995 Summer Simulation Conference, Ottawa, Canada, 1995, pp 32-37.
23. K.H. Kim, Y.R. Seong, T.G. Kim, K.H. Park, Ordering of simultaneous events in distributed DEVS simulation. Journal Simulation Practice and Theory 5 (3) (1997) 253-268.
24. K.H. Kim, Y.R. Seong, T.G. Kim, K.H. Park, Distributed simulation of hierarchical DEVS models: hierarchical scheduling locally and time warp globally. Transactions of the Society for Computer Simulation 13 (3) (1997).
25. T.G. Kim, DEVS formalism: reusable model specification in an object-oriented framework, International Journal in Computer Simulation 5 (4) (1995) 397-416.
26. P. Konas, P.C. Yew, Partitioning for synchronous parallel simulation, in: Proceedings of the 1995 Workshop on Parallel and Distributed Simulation Lake Placid, New York, 1995, pp. 181-184.
27. J. Misra, Distributed discrete-event simulation, ACM Computing Surveys 18 (1) (1986) 39-65.
28. R. Sargent, Hierarchical modeling for discrete event simulation (panel), in: Proceedings of the 1993 Winter Simulation Conference, Los Angeles, CA, 1993, p. 569.
29. Y.R. Seong, S.H. Jung, T.G. Kim, K.H. Park, Parallel simulation of hierarchical modular DEVS models: a modified Time Warp approach, International Journal in Computer Simulation 5 (3) (1995) 263-285.
30. Y.R. Seong, T.G. Kim, K.H. Park, Mapping hierarchical modular discrete event models in a hypercube multicomputer, Simulation Practice and Theory, 1995, pp. 257-275.
31. C.C. Shen, W.H. Tsai, A graph matching approach to optimal task assignment in distributed computing systems using a minimax criterion, IEEE Transactions on Computers 34 (3) (1985) 197-203.
32. S.P. Smith, M.R. Mercer, B. Underwood, An analysis of several approaches to circuit partitioning for parallel logic simulation, in: International Conference on Computer Design, 1987, pp. 664-667
33. Y.H. Wang, Discrete-event simulatior on a massively parallel computer, Ph.D Thesis, University of Arizona, 1992.
34. B.W. Unger, Distributed simulation, in: M. Abrams, P. Haigh, J. Comfort (Eds.), Proceedings of the 1988 Winter Simulation Conference, 1988.
35. B.P. Zeigler, Theory of Modelling and Simulation, John Wiley. New York, 1976.
36. B.P. Zeigler, Multifacetted modelling and discrete event simulation, Academic Press, New York, 1984.
37. B.P. Zeigler, G. Zhang, Mapping hierarchical discrete event models to multiprocessor systems: Concepts, algorithm, and simulation, Journal Parallel and Distributed Computing 10 (3) (1990) 271-281.