Low-IF topologies for high-performance analog front ends of fully integrated receivers

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 45, Issue 3, 1998, Pages 269-282

  Croîs, Jan ^a   Steyaert, Michiel S J ^a  

^a UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL SIGNAL PROCESSING; ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK SYNTHESIS; ELECTRIC NETWORK TOPOLOGY;

ANALOG RECEIVER FRONT ENDS;

SIGNAL RECEIVERS;

EID: 0032022295     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.664233     Document Type: Article

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