Lessons learned from implementing BSP

Future Generation Computer Systems

Volumn 13, Issue 4-5, 1998, Pages 327-335

  Hill, Jonathan M D ^a   Skillicorn, David B ^b  

^a UNIVERSITY OF OXFORD   (United Kingdom)

^b QUEEN S UNIVERSITY   (Canada)

Author keywords

Barrier synchronisation; Broadcast; BSP; Performance modelling; Total exchange

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER PROGRAMMING; COMPUTER SIMULATION; PERFORMANCE;

BARRIER SYNCHRONISATION; BULK SYNCHRONOUS PARALLELISM; TOTAL EXCHANGE;

PARALLEL PROCESSING SYSTEMS;

EID: 0032021962     PISSN: 0167739X     EISSN: None     Source Type: Journal    
DOI: 10.1016/s0167-739x(97)00034-4     Document Type: Article

References (6)

1. M.W. Goudreau, J.M.D. Hill, K. Lang, W.F. McColl, S.D. Rao, D.C. Stefanescu, T. Suel, T. Tsantilas, A proposal for a BSP Worldwide standard, BSP Worldwide, http://www.bsp-worldwide.org/, April 1996.
2. D. Grunwald, S. Vajracharya, Efficient barriers for distributed shared memory computers, in: Proceedings of the Eighth International Symposium on Parallel Processing, April 1994.
3. J.M.D. Hill, D.B. Skillicorn, Practical barrier synchronisation, in: Proceedings of the Sixth Euromicro Workshop on Parallel and Distributed Processing, Barcelona, Spain, January 1998.
4. W.F. McColl, General purpose parallel computing, in: A.M. Gibbons, P. Spirakis (Eds.), Lectures on Parallel Computation, Cambridge International Series on Parallel Computation, Cambridge University Press, Cambridge, 1993, pp. 337-391.
5. D.B. Skillicorn, J.M.D. Hill, W.F. McColl, Questions and answers about BSP, Scientific Programming, to appear; Also appears as Technical Report TR-15-96, Oxford University Computing Laboratory, November 1996.
6. L.G. Valiant, A bridging model for parallel computation, Commun. ACM 33 (8) (1990) 103-111.