A novel delayed flip-flop circuit using resonant tunneling logic gates

Japanese Journal of Applied Physics, Part 2: Letters

Volumn 37, Issue 2 SUPPL. B, 1998, Pages

  Maezawa, Koichi ^a,b   Matsuzaki, Hideaki ^a   Akeyoshi, Tomoyuki ^a   Osaka, Jiro ^a   Yamamoto, Masafumi ^a   Otsuji, Taiichi ^a  

^a NTT CORPORATION   (Japan)

^b NAGOYA UNIVERSITY   (Japan)

Author keywords

Delayed flip flop; HEMT; InAlAs; InGaAs; InP; Resonant tunneling diode

Indexed keywords

FABRICATION; HIGH ELECTRON MOBILITY TRANSISTORS; LOGIC CIRCUITS; LOGIC GATES; SEMICONDUCTING INDIUM PHOSPHIDE; SUBSTRATES;

MONOSTABLE-BISTABLE TRANSITION LOGIC ELEMENTS;

FLIP FLOP CIRCUITS;

EID: 0032000027     PISSN: 00214922     EISSN: None     Source Type: Journal    
DOI: 10.1143/JJAP.37.L212     Document Type: Article

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