Amorphous silicon buriEDchannel thin-film transistors

IEEE Transactions on Electron Devices

Volumn 45, Issue 2, 1998, Pages 447-452

  Weber, Cory ^a   Abelson, John R ^b  

^a University of Illinois at Urbana Champaign   (United States)

^b INTEL CORPORATION   (United States)

Author keywords

Amorphous semiconductor materials devices; Buried channel; Flat panel display; Mis devices; Silicon materials devices; Sputtering; Thin film transistor

Indexed keywords

AMORPHOUS SILICON; CAPACITANCE MEASUREMENT; CAPACITORS; CURRENT VOLTAGE CHARACTERISTICS; ELECTRIC CURRENT MEASUREMENT; ENERGY GAP; INTERFACES (MATERIALS); MAGNETRON SPUTTERING; MIS DEVICES; PLASMAS; SILICON NITRIDE; VOLTAGE MEASUREMENT;

BURIED CHANNEL HYDROGENATED AMORPHOUS SILICON THIN FILM TRANSISTORS; FLAT PANEL DISPLAYS;

THIN FILM TRANSISTORS;

EID: 0031999155     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.658679     Document Type: Article

References (17)

1. C. Chen and J. Kanicki, "High field-effect-mobility a-Si:H TFT based on high deposition-rate PECVD materials," IEEE Electron Device Lett., vol. 17, p. 437, 1996.
2. C. S. McCormick, C. E. Weber, and J. R. Abelson, "An amorphous silicon thin-film transistor fabricated at 125 °C by DC reactive magnetron sputtering," Appl. Phys. Lett., vol. 70, p. 226, 1997.
3. M. J. Powell and J. W. Orton, "Characteristics of amorphous silicon staggerEDelectrode thin-film transistors," Appl. Phys. Lett., vol. 45, p. 171, 1984.
4. K. Hiranaka, T. Yoshimara, and T. Yamaguchi, "Influence of a-SiNH gate insulator on an amorphous silicon thin-film transistor," J. Appl. Phys., vol. 62, p. 2129, 1987.
5. N. Ibaraki, K. Frukuda, and H. Takata, "Effect of interface states on amorphous-silicon transistors," IEEE Trans. Electron. Devices, vol. 36, p. 2971, 1989.
6. M. Hicks, S. Lee, C. R. Wronski, and M. Pinarbarsi, "The internal photoemission of electrons and holes from metals into hydrogenated amorphous silicon," in Mater. Res. Soc. Symp. Proc., vol. 149, 1989, p. 303.
7. S. S. lyer, P. M. Solomon, V. P. Kesan, A. A. Bright, J. L. Freeouf, T. Nguyen, and A. C. Warren, "A gate-quality dielectric system for SiGe metal-oxide-semiconductor devices," IEEE Electron Device Lett., vol. 12, p. 246, May 1991.
8. P. M. Garone, V. Venkataraman, and J. C. Sturm, "Hole confinement MOS-gated GeSii-/Si heterostructures," IEEE Electron Device Lett., vol. 12, p. 230, May 1991.
9. _, "Hole mobility enhancement in MOS-gated GeSii-/Si heterostructure inversion layers," IEEE Electron Device Lett., vol. 13, p. 56, Jan. 1992.
10. D. K. Nayak, J. C. S. Woo, J. S. Park, K.-L Wang, and K. P. Mac Williams, "Enhancement-mode quantum-well GeSii- PMOS," IEEE Electron Device Lett., vol. 12, p. 154, 1991.
11. M. Pinarbasi, N. Maley, A. Myers, and J. R. Abelson, "Hydrogenated amorphous silicon deposited by reactive sputtering-the electronic properties, hydrogen bonding and microstructure," Thin Solid Films, vol. 171, p. 217, 1989.
12. Mask set designed for the ARPA Active Matrix Flat Panel Display Program and Supplied by the Intevac Corp.
13. C. S. McCormick, C. E. Weber, J. R. Abelson, G. A. Davis, R. E. Weiss, and V. Aebi, "Low-temperature fabrication of amorphous silicon thin-film transistors by dc reactive magnetron sputtering," J. Vac. Sei. Technol. A. vol. 15 no. 5, 1997.
14. J. Sellers, "Asymmetric bipolar pulsed dc: the enabling technology for reactive PVD," ENI Technical Note, 1996. Available from ENI, 100 Highpower Rd., Rochester, NY 14623.
15. R. R. Troutman and F. R. Libsch, "Modeling and parameter extraction of amorphous silicon thin-film-tranistors for active-matrix liquid-crystal displays," in IEDM Tech. Dig.. 1990, p. 855.
16. S. Hazra, A. R. Middya, and S. Ray, "Highly photosensitive helium diluted amorphous silicon 1.5 eV band gap: Role of pressure," J. Appl. Phys.. vol. 78, p. 581, 1995.
17. J. Kanicki, "Contact resistance to undoped and phosphorus-doped hydrogenated amorphous silicon films," Appl. Phys. Lett., vol. 53, p. 1943, 1988.