A reliable fail-safe system

IEEE Transactions on Computers

Volumn 47, Issue 2, 1998, Pages 236-241

  Lubaszewski, Marcelo ^a   Courtois, Bernard ^b  

^a FEDERAL UNIVERSITY OF RIO GRANDE DO SUL   (Brazil)

^b TIMA LABORATORY   (France)

Author keywords

Built in self test; Concurrent error detection; Fail safe; Reliability; Self checking

Indexed keywords

ERROR DETECTION; INTEGRATED CIRCUIT TESTING; INTERFACES (COMPUTER); RELIABILITY;

BUILT IN SELF TEST (BIST) TECHNIQUE; ERROR MASKING INTERFACES;

FAULT TOLERANT COMPUTER SYSTEMS;

EID: 0031997904     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.663771     Document Type: Article

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