PRD-based global-mean-time signaling for high-speed chip-to-chip communications

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 1998, Pages 164-165,-432

  Tamura, Hirotaka ^a   Gotoh, Kohtaroh ^a   Araki, Hisakatsu ^a   Wakayama, Shigetoshi ^a   Cheung, Tsz Shi ^a   Saito, Miyoshi ^a   Ogawa, Junji ^a   Kato, Yoshiharu ^a   Nishi, Toshiya ^a   Kawano, Michiari ^a   Taguchi, Masao ^a   Imamura, Takeshi ^a  

^a FUJITSU LABORATORIES LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER CIRCUITS; COMPUTER SIMULATION; DATA COMMUNICATION SYSTEMS; DELAY CIRCUITS; ELECTRIC RESISTANCE; INTERSYMBOL INTERFERENCE; PHASE SHIFT; PRINTED CIRCUIT BOARDS; RANDOM ACCESS STORAGE; SIGNAL DETECTION; TIMING CIRCUITS;

GLOBAL MEAN TIME (GMT); PARTIAL RESPONSE DETECTION (PRD); SOFTWARE PACKAGE SPICE;

MICROPROCESSOR CHIPS;

EID: 0031704813     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (1)