Speeding up program execution using reconfigurable hardware and a hardware function library

Proceedings of the IEEE International Conference on VLSI Design

Volumn , Issue , 1998, Pages 400-405

  Jain, Sitanshu ^a   Balakrishnan, M ^a   Kumar, Anshul ^a   Kumar, Shashi ^a  

^a INDIAN INSTITUTE OF TECHNOLOGY DELHI   (India)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; C (PROGRAMMING LANGUAGE); COMPUTER ARCHITECTURE; DATA STORAGE EQUIPMENT; HEURISTIC METHODS; LOGIC GATES;

FIELD PROGRAMMABLE GATE ARRAYS (FPGA); HARDWARE FUNCTION LIBRARY;

COMPUTER AIDED LOGIC DESIGN;

EID: 0031704618     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)