Challenges and trends in processor design

Computer

Volumn 31, Issue 1, 1998, Pages 39-50

  Tremblay, Mark ^a   Grohoski, Greg ^a   Burgess, Brad ^a   Killian, Earl ^a   Colwell, Robert ^a   Rubinfeld, Paul I ^a  

^a NONE

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; DATA COMMUNICATION SYSTEMS; TECHNOLOGICAL FORECASTING; TIMING CIRCUITS;

COMMUNICATION ENHANCEMENT DEVICES;

MICROPROCESSOR CHIPS;

EID: 0031704360     PISSN: 00189162     EISSN: None     Source Type: None    
DOI: 10.1109/2.641976     Document Type: Article

References (5)

1. B. R. Rau The Cydra 5 Departmental Supercomputer Computer 12 35 Jan. 1989
2. S. A. Mahlke A Comparison of Full and Partial Predicated Execution Support for ILP Processors Proc. Int'l Symp. Computer Architecture 138 149 Proc. Int'l Symp. Computer Architecture 1995
3. V. Kathail M. S. Schlansker B. R. Rau HPL Play-Doh Architecture Specification: Version 1.0 1334 Calif., Palo Alto HPL-93-80 Hewlett-Packard Labs
4. D. I. August W. W. Hwu S. A. Mahlke A Framework for Balancing Control Flow and Predication Proc. Micro-30 92 103 Proc. Micro-30 1997
5. W. W. Hwu Compiler Technology for Future Microprocessors Proc. IEEE 1995