Starfire: Extending the SMP envelope

IEEE Micro

Volumn 18, Issue 1, 1998, Pages 39-49

  Charlesworth, Alan ^a,b  

^a SUN MICROSYSTEMS   (United States)

^b STANFORD UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; BUFFER STORAGE; COMPUTER ARCHITECTURE; COMPUTER WORKSTATIONS; DATA ACQUISITION; DATA COMMUNICATION SYSTEMS; INTERCONNECTION NETWORKS; MICROPROCESSOR CHIPS; RESPONSE TIME (COMPUTER SYSTEMS);

CACHE COHERENT SYMMETRIC MULTIPROCESSORS (SMP); SNOOPY BUS BASED UNIFORM MEMORY ACCESS INTERCONNECTS;

MULTIPROCESSING SYSTEMS;

EID: 0031704349     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/40.653032     Document Type: Article

References (8)

1. J. Hennessy and D. Patterson, Computer Architecture: A Quantitative Approach, 2nd ed., Morgan-Kaufman, San Mateo, Calif., 1996.
2. B. Catanzaro, Multiprocessor System Architectures, Prentice Hall, Englewood Cliffs, N.J., 1994.
3. K. Normoyle et al., "The UltraSPARC Port Architecture," Proc. Hot Interconnects Symp. III, 1995, available from author at kevin.normoyle@eng.sun.com.
4. A. Singhal et al., "Gigaplane: A High Performance Bus for Large SMPs," Proc Hot Interconnects Symp. IV, 1996, available from author at ashok.singhal@eng.sun.com.
5. B. A. Charlesworth et al., "Gigaplane-XB: Extending the Ultra Enterprise Family," Proc. Hot Interconnects Symp. V, 1997, http://HTTP.CS.Berkeley.EDU/culler/hoti97/E10000.ps.
6. Transaction Processing Performance Council, 7PC Benchmark Results; see http://www.tpc.org/bench.results.html for current results.
7. J.J. Dongarra, "Performance of Various Computers Using Standard Linear Equations Software" (see http://performance. netlib.org/performance/html/PERFORM.ps for current report).
8. The Standard Performance Evaluation Corp., 5PEC CPU95 Results (see http://www.specbench.org/osg/cpu95/results/for current results).