Parallel algorithm for zero skew clock tree routing

Proceedings of the International Symposium on Physical Design

Volumn , Issue , 1998, Pages 118-123

  Xing, Zhaoyun ^a   Banerjee, Prithviraj ^a  

^a SUN MICROSYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ITERATIVE METHODS; MULTIPROCESSING SYSTEMS; PARALLEL ALGORITHMS; TREES (MATHEMATICS);

WIRE SIZING; ZERO SKEW CLOCK TREE ROUTING;

INTEGRATED CIRCUIT LAYOUT;

EID: 0031685850     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (13)