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Volumn , Issue , 1998, Pages 129-134
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Pattern matching algorithm for verification and analysis of very large IC layouts
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Author keywords
[No Author keywords available]
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Indexed keywords
ALGORITHMS;
COMPUTER AIDED DESIGN;
DATA REDUCTION;
DATABASE SYSTEMS;
PATTERN MATCHING ALGORITHMS;
INTEGRATED CIRCUIT LAYOUT;
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EID: 0031683753
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (8)
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References (13)
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