RCRS: A framework for loop scheduling with limited number of registers

Proceedings of the IEEE Great Lakes Symposium on VLSI

Volumn , Issue , 1998, Pages 386-391

  Wang, Kaisheng ^a   Yu, Ted Zhihong ^a   Sha, Edwin H M ^a  

^a UNIVERSITY OF NOTRE DAME   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CONSTRAINT THEORY; GRAPH THEORY; OPTIMIZATION; SHIFT REGISTERS;

DATA FLOW GRAPHS (DFG); REGISTER CONSTRAINED ROTATION SCHEDULING (RCRS);

LOGIC DESIGN;

EID: 0031676819     PISSN: 10661395     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)