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Volumn 5, Issue 2, 1998, Pages 117-127

Network flow approach to data regeneration for low energy embedded system synthesis

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COST EFFECTIVENESS; DATA COMPRESSION; ELECTRIC NETWORK SYNTHESIS; ENERGY DISSIPATION; STORAGE ALLOCATION (COMPUTER);

EID: 0031675229     PISSN: 10692509     EISSN: None     Source Type: Journal    
DOI: 10.3233/ica-1998-5203     Document Type: Article
Times cited : (2)

References (22)
  • 1
    • 0027266117 scopus 로고
    • Hobbit: A High Performance Low Energy Microprocessor
    • Argade, P., et al. (1993) "Hobbit: A High Performance Low Energy Microprocessor", COMPCON 88-95.
    • (1993) COMPCON , pp. 88-95
    • Argade, P.1
  • 4
    • 0028732806 scopus 로고
    • A Low-Power Chipset for a Portable Multimedia I/O Terminal
    • Chandrakasan, A., Burstein, A. and Brodersen, R. (1994) "A Low-Power Chipset for a Portable Multimedia I/O Terminal", IEEE J Solid State Circuits, 29(12): 1415-1428.
    • (1994) IEEE J Solid State Circuits , vol.29 , Issue.12 , pp. 1415-1428
    • Chandrakasan, A.1    Burstein, A.2    Brodersen, R.3
  • 5
    • 0029231165 scopus 로고
    • Optimizing Power Using Transformations
    • Chandrakasan, A., et al. (1995) "Optimizing Power Using Transformations", IEEE Trans, on CAD, J 14(1): 12-31.
    • (1995) IEEE Trans, on CAD, J , vol.14 , Issue.1 , pp. 12-31
    • Chandrakasan, A.1
  • 7
    • 0027658999 scopus 로고
    • Throughput Optimized Architectural Synthesis
    • Gebotys, C. (1993) "Throughput Optimized Architectural Synthesis", IEEE Trans VLSI 1(3) 254-261.
    • (1993) IEEE Trans VLSI , vol.1 , Issue.3 , pp. 254-261
    • Gebotys, C.1
  • 9
    • 0028754317 scopus 로고
    • The Impact of CAD on the Design of Low Power Digital Circuits
    • Keutzer, K. (1994) "The Impact of CAD on the Design of Low Power Digital Circuits", IEEE Symposium on Low Power Electronics, pp. 42-45.
    • (1994) IEEE Symposium on Low Power Electronics , pp. 42-45
    • Keutzer, K.1
  • 12
    • 0029504790 scopus 로고
    • A Memory Allocation Technique for Low-Energy Embedded DSP Software
    • Lee, Tiwari (1995) "A Memory Allocation Technique for Low-Energy Embedded DSP Software", Symposium on Low Power Electronics, pp. 24-25.
    • (1995) Symposium on Low Power Electronics , pp. 24-25
    • Lee, T.1
  • 14
    • 0025450394 scopus 로고
    • A Voltage Reduction Technique for Digital Systems
    • Macken, P., et al. (1990) "A Voltage Reduction Technique for Digital Systems", ISSCC, pp. 238-9.
    • (1990) ISSCC , pp. 238-239
    • Macken, P.1
  • 17
    • 0026170603 scopus 로고
    • A Model for Estimating Power Dissipation in a Class of DSP VLSI Chips
    • Powell, S. and Chau, P. (1991) "A Model for Estimating Power Dissipation in a Class of DSP VLSI Chips", IEEE Trans on Circuits and Systems 38(6).
    • (1991) IEEE Trans on Circuits and Systems , vol.38 , Issue.6
    • Powell, S.1    Chau, P.2
  • 20
    • 0017417984 scopus 로고
    • Multiprocessor Scheduling with the Aid of Network Flow Algorithms
    • Stone, H.S. (1977) "Multiprocessor Scheduling with the Aid of Network Flow Algorithms", IEEE Trans on Software Engineering, SE3(1): 85-93.
    • (1977) IEEE Trans on Software Engineering , vol.SE3 , Issue.1 , pp. 85-93
    • Stone, H.S.1
  • 21
    • 11544325483 scopus 로고
    • A Real Time Implementation of Key VSELP Routines on a 16-bit DSP Chip
    • Sunwoo, M., Park, S. and Terry, K. (1991) "A Real Time Implementation of Key VSELP Routines on a 16-bit DSP Chip", Proc. Int. Conf. Consumer Electronics, 332-333.
    • (1991) Proc. Int. Conf. Consumer Electronics , pp. 332-333
    • Sunwoo, M.1    Park, S.2    Terry, K.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.