MDG-based verification by retiming and combinational transformations

Proceedings of the IEEE Great Lakes Symposium on VLSI

Volumn , Issue , 1998, Pages 356-361

  Mohamed, O Ait ^a   Cerny, E ^a   Song, X ^a  

^a UNIVERSITÉ DE MONTRÉAL   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

DECISION THEORY; GRAPH THEORY; MATHEMATICAL TRANSFORMATIONS;

MULTIWAY DECISION GRAPHS (MDG);

ELECTRIC NETWORK SYNTHESIS;

EID: 0031674313     PISSN: 10661395     EISSN: None     Source Type: None    
DOI: 10.1109/GLSV.1998.665311     Document Type: Conference Paper

References (9)

1. R. E. Bryant Graph-based algorithms for boolean function manipulation IEEE Transactions on Computers 35 8 677 691 August 1986
2. J. R. Burch E. M. Clarke D. E. Long K. L. McMillan D. L. Dill Symbolic model checking for sequential circuit verification IEEE Transactions on Computer-Aided Design 13 4 401 424 April 1994
3. F. Corella Z. Zhou X. Song M. Langevin E. Cerny Multiway decision graphs for automated hardware verification Formal Methods in System Design 10 1 7 46 February 1997
4. O. Coudert C. Berthet J. C. Madre Automatic Verification Methods for Finite State Systems 407 1989 Springer-Verlag Verification of synchrounous sequential machines based on symbolic execution
5. K. Fisler K. Johnson Integrating Design and Verification Environments Through A Logic Supporting Hardware Daigrams Proc. IFIP Conference on Hardware Description Languages and their Applications (CHDL'95) Proc. IFIP Conference on Hardware Description Languages and their Applications (CHDL'95) Chiba Japan 1995-August
6. M. Langevin S. Tahar Z. Zhou X. Song E. Cerny Behavioral verification of an ATM switch fabric using implicit abstract state enumeration Proc. of the International Conference on Computer Design (ICCD'96) Proc. of the International Conference on Computer Design (ICCD'96) Austin USA Texas 1996-October
7. C. Leiserson J. Saxe Retiming Synchronous Circuitry Algorithmica 6 5 35 1991
8. S. Tahar Z. Zhou X. Song E Cerny M. Langevin Formal verification of an ATM switch fabric using multiway decision graphs Proc. of the Great Lakes Symposium on VLSI (GLS-VLSI'96) Proc. of the Great Lakes Symposium on VLSI (GLS-VLSI'96) Arres USA Iowa 1996-March
9. Z. Zhou X. Song S. Tahar F. Corella E. Cerny M. Langevin Formal verification of the island tunnel controller using multiway decision graphs Proc. of International Conference on Formal Methods in Computer Aided Design (FMCAD'96) Proc. of International Conference on Formal Methods in Computer Aided Design (FMCAD'96) Palo Alto USA Calfornia 1996-November