Neuron-MOS VT cancellation circuit and its application to a low-power and high-swing cascode current mirror

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

Volumn E81-A, Issue 1, 1998, Pages 110-116

  Tanno, Koichi ^a   Shen, Jing ^a   Ishizuka, Okihiko ^a   Tang, Zheng ^a  

^a UNIVERSITY OF MIYAZAKI   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC CURRENT CONTROL; ELECTRIC NETWORK ANALYSIS; INTEGRATED CIRCUIT LAYOUT; VOLTAGE CONTROL;

ANALOG CIRCUITS; HIGH SWING CASCODE CURRENT MIRROR; SOFTWARE PACKAGE HSPICE; THRESHOLD VOLTAGES;

MOS DEVICES;

EID: 0031674204     PISSN: 09168508     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (12)