256×256 CMOS imaging array with wide dynamic range pixels and column-parallel digital output

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 1998, Pages 176-177,-433

  Decker, S ^a   McGrath, R ^a   Brehmer, K ^a   Sodini, C ^a  

^a MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; CAPACITORS; CMOS INTEGRATED CIRCUITS; IMAGE QUALITY; MICROPROCESSOR CHIPS; MOS DEVICES; MULTIPLEXING EQUIPMENT; OPERATIONAL AMPLIFIERS; SHIFT REGISTERS; SPURIOUS SIGNAL NOISE; TIMING CIRCUITS;

FIXED PATTERN NOISE (FPN);

IMAGE SENSORS;

EID: 0031651835     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)