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Volumn , Issue , 1998, Pages 808-811
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HW/SW coverification performance estimation &benchmark for a 24 embedded risc core design
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Author keywords
[No Author keywords available]
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Indexed keywords
AUTOMATION;
DESIGN;
COMPUTER SIMULATION;
EMBEDDED SYSTEMS;
CO-VERIFICATION;
DESIGN COMPLEXITY;
DESIGN STRATEGIES;
PERFORMANCE ESTIMATION;
PUBLIC COMMUNICATION NETWORKS;
RISC CORE;
SIEMENS AG;
SIMULATION SPEED;
BENCHMARKING;
REDUCED INSTRUCTION SET COMPUTING;
COVERIFICATION PERFORMANCE;
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EID: 0031645525
PISSN: 0738100X
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1145/277044.277250 Document Type: Conference Paper |
Times cited : (10)
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References (8)
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