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Volumn , Issue , 1998, Pages 42-43

Interconnect scaling: Signal integrity and performance in future high-speed CMOS designs

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; COPPER; CROSSTALK; DIELECTRIC MATERIALS; INTEGRATED CIRCUIT LAYOUT; ULSI CIRCUITS;

EID: 0031645246     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (44)

References (7)
  • Reference 정보가 존재하지 않습니다.

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.