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Volumn , Issue , 1998, Pages 133-135
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Power consumption of parallel spread spectrum correlator architectures
a a |
Author keywords
[No Author keywords available]
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Indexed keywords
ADDERS;
CMOS INTEGRATED CIRCUITS;
COMPUTER AIDED DESIGN;
CORRELATION THEORY;
CORRELATORS;
ELECTRIC LOSSES;
INTEGRATED CIRCUIT LAYOUT;
BINARY TREE NETWORK;
DIRECT SEQUENCE SPREAD SPECTRUM SYSTEM;
PARALLEL CORRELATION;
PSEUDONOISE CODE;
ELECTRIC POWER SUPPLIES TO APPARATUS;
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EID: 0031643692
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (14)
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References (3)
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