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Volumn , Issue , 1998, Pages 251-255
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Void-effect modeling of flip-chip encapsulation on ceramic substrate
a a a
a
IBM
(United States)
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Author keywords
[No Author keywords available]
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Indexed keywords
CERAMIC MATERIALS;
COMPUTER SIMULATION;
ELECTRONICS PACKAGING;
ENCAPSULATION;
FINITE ELEMENT METHOD;
MATHEMATICAL MODELS;
MICROELECTRONIC PROCESSING;
SOLDERING;
STRAIN;
STRESSES;
SUBSTRATES;
THERMAL CYCLING;
SOLDER BUMPS;
UNDERFILL;
VOIDS;
FLIP CHIP DEVICES;
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EID: 0031642324
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (5)
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References (8)
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