Optimal design of low power nested GM-C compensation amplifiers using a current-based MOS transistor model

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 2, Issue , 1998, Pages 29-32

  Xie, X ^a   Schneider, M C ^a   Embabi, S H K ^a   Sanchez Sinencio, E ^a  

^a TEXAS A AND M UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; CMOS INTEGRATED CIRCUITS; ELECTRIC NETWORK SYNTHESIS; ENERGY UTILIZATION; OPERATIONAL AMPLIFIERS; SIGNAL THEORY; TRANSCONDUCTANCE;

COMPENSATION AMPLIFIERS; NESTED TRANSCONDUCTANCE-CAPACITANCE COMPENSATION (NGCC);

MOSFET DEVICES;

EID: 0031641690     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)