Hybrid techniques for fast functional simulation

Proceedings - Design Automation Conference

Volumn , Issue , 1998, Pages 664-667

  Luo, Yufeng ^a   Wongsonegoro, Tjahjadi ^b   Aziz, Adnan ^b  

^a SYNOPSYS INC   (United States)

^b UNIVERSITY OF TEXAS AT AUSTIN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DESIGN; BINARY CODES; COMPUTER SIMULATION; DIGITAL CIRCUITS; LOGIC GATES; MACROS; PROGRAM COMPILERS;

BRANCHING PROGRAMS; CODE SIMULATION; CYCLE SIMULATION; FUNCTIONAL SIMULATIONS; FUNCTIONAL UNITS; HYBRID TECHNIQUES; MEMORY PERFORMANCE; VERIFICATION TECHNIQUES;

AUTOMATION; COMPUTER AIDED NETWORK ANALYSIS;

BINARY DECISION DIAGRAMS (BDD); FAST FUNCTIONAL SIMULATION;

EID: 0031641246     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/277044.277213     Document Type: Conference Paper

References (12)

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