Analysis of delamination in IC packages using a new variable-order singular boundary element

Proceedings - Electronic Components and Technology Conference

Volumn Part F133492, Issue , 1998, Pages 936-943

  Tay, A A O ^a   Lee, K H ^a   Lim, K M ^a  

^a NATIONAL UNIVERSITY OF SINGAPORE   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

BOUNDARY ELEMENT METHOD; CRACK PROPAGATION; INTEGRATED CIRCUITS; NETWORK COMPONENTS; SAILING VESSELS; TIMING CIRCUITS; DEFECTS; DELAMINATION; FAILURE ANALYSIS; INTERFACES (MATERIALS); STRESS INTENSITY FACTORS; TOUGHNESS;

ACCURATE ANALYSIS; DELAMINATION PROPAGATION; INTERFACE TOUGHNESS; INTERFACIAL DEFECT; INTERFACIAL DELAMINATION; MECHANICAL FAILURES; SINGULAR BOUNDARY; VARIABLE ORDER;

CRACK TIPS; ELECTRONICS PACKAGING;

POPCORN CRACKING; VARIABLE ORDER SINGULAR BOUNDARY ELEMENT METHOD;

EID: 0031640716     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.1998.678821     Document Type: Conference Paper

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