Optimizing circuits with confidence probability using probabilistic retiming

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 6, Issue , 1998, Pages 270-273

  Tongsima, S ^a   Chantrapornchai, C ^a   Sha, E H M ^a   Passos, Nelson L ^a  

^a UNIVERSITY OF NOTRE DAME   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; INTEGRATED CIRCUIT LAYOUT; OPTIMIZATION; POLYNOMIALS; PROBABILITY; SEMICONDUCTOR DEVICE MODELS;

PROBABILISTIC RETIMING;

VLSI CIRCUITS;

EID: 0031639546     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (16)