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Volumn , Issue , 1998, Pages 404-409
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Fault tolerant CNN template design and optimization based on chip measurements
a a a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
BOOLEAN ALGEBRA;
DIGITAL INTEGRATED CIRCUITS;
FAULT TOLERANT COMPUTER SYSTEMS;
LINEAR INTEGRATED CIRCUITS;
MATHEMATICAL OPERATORS;
MICROPROCESSOR CHIPS;
OPTIMIZATION;
CELLULAR NEURAL NETWORK UNIVERSAL MACHINE (CNNUM) CHIPS;
CELLULAR NEURAL NETWORKS;
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EID: 0031638972
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (3)
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References (18)
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