Thermal fatigue of solder flip-chip assemblies

Proceedings - Electronic Components and Technology Conference

Volumn Part F133492, Issue , 1998, Pages 872-877

  Roesner, B ^a   Baraton, X ^a   Guttmann, K ^a   Samin, C ^a  

^a Optical Recording Research Lab   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

BINARY ALLOYS; CHIP SCALE PACKAGES; DETERIORATION; INTEGRATED CIRCUIT INTERCONNECTS; LEAD ALLOYS; NETWORK COMPONENTS; SILVER ALLOYS; SOLDERING; THERMAL CYCLING; THERMAL FATIGUE; TIN ALLOYS; ELECTRIC RESISTANCE; FLIP CHIP DEVICES; THERMAL EFFECTS;

CHIP SIZES; COFFIN-MANSON EQUATION; ELECTRICAL RESISTANCES; FLIP CHIP ASSEMBLIES; FLIP CHIP TECHNOLOGIES; FLIP-CHIP INTERCONNECTION; HIGH FREQUENCY PERFORMANCE; VARIOUS SUBSTRATES;

FLIP CHIP DEVICES; ELECTRONICS PACKAGING;

COFFIN MANSION EQUATION; THERMAL SHOCK;

EID: 0031638614     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.1998.678810     Document Type: Conference Paper

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