Challenge of high-performance, deep-submicron design in a turnkey ASIC environment

Proceedings of the Annual IEEE International ASIC Conference and Exhibit

Volumn , Issue , 1998, Pages 183-186

  Shepard, K L ^a  

^a Columbia Univ ^*  (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUIT LAYOUT; LOGIC CIRCUITS; LOGIC DESIGN; SPURIOUS SIGNAL NOISE;

DEEP-SUBMICRON DESIGN; TRANSISTOR-LEVEL SYNTHESIS;

APPLICATION SPECIFIC INTEGRATED CIRCUITS;

EID: 0031638412     PISSN: 10630988     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (25)