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Volumn , Issue , 1998, Pages 27-34
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Boolean matching for complex PLBs in LUT-based FPGAs with application to architecture evaluation
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Author keywords
[No Author keywords available]
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Indexed keywords
BOOLEAN FUNCTIONS;
COMPUTER ARCHITECTURE;
TABLE LOOKUP;
BOOLEAN MATCHING;
PROGRAMMABLE LOGIC BLOCKS (PLB);
FIELD PROGRAMMABLE GATE ARRAYS;
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EID: 0031635933
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1145/275107.275116 Document Type: Conference Paper |
Times cited : (15)
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References (13)
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