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Volumn , Issue , 1998, Pages 61-64

33 V, 0.25 mΩ-cm2 n-channel LDMOS in a 0.65 μm smart power technology for 20-30 V applications

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC POTENTIAL; ELECTRIC RESISTANCE; GATES (TRANSISTOR); POWER ELECTRONICS;

EID: 0031634388     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (28)

References (4)
  • Reference 정보가 존재하지 않습니다.

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.