The execution of aggressive PBGA substrate yield learning in an existing PWB facility

Proceedings - Electronic Components and Technology Conference

Volumn Part F133492, Issue , 1998, Pages 834-837

  Fuller, J W ^a   Norton, E M ^b  

^a IBM   (United States)

^b Hadco Corporation   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

NETWORK COMPONENTS; PRINTED CIRCUIT BOARDS; PRINTED CIRCUIT MANUFACTURE; SUBSTRATES;

COMPLEX LOGISTICS; CUSTOMER REQUIREMENTS; DEFECT MECHANISMS; DELIVERY SCHEDULES; ENGINEERING SPECIFICATION; ORGANIZATION STRUCTURES; PRODUCT INTRODUCTION; YIELD IMPROVEMENT;

SUBSTRATES; ELECTRONICS PACKAGING;

PLASTIC BALL GRID ARRAYS (PBGA);

EID: 0031633071     PISSN: 05695503     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ECTC.1998.678804     Document Type: Conference Paper

References (4)

1. Murray, J., "High End Chip Packages", Printed Circuit Fabrication, October 1997.
2. Murray, J., "SPFs Laminated Chip Carriers", Printed Circuit Fabrication, November 1997.
3. Murray, J., "The PCB Chip Carrier Race is On!", Circuits Assembly, October 1997
4. Delisle, G., Dibble, E, Fuller, J., "Transition : Lessons Learned in the Development and Production of IBM's Micro-Laminate PBGA", Proc 46th Electronic Components and Technology Conference, Orlando, FL, May 1996, pp. 1244-1250.