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Volumn 2, Issue , 1998, Pages 470-473
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Self-calibrating clock distribution with scheduled skews
a a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
ELECTRIC NETWORK ANALYSIS;
INTEGRATED CIRCUIT LAYOUT;
MICROPROCESSOR CHIPS;
PHASE LOCKED LOOPS;
NON-ZERO INTENTIONAL SKEWS;
SELF-CALIBRATING CLOCK DISTRIBUTION SCHEMES;
UNINTENTIONAL SKEWS;
TIMING CIRCUITS;
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EID: 0031632292
PISSN: 02714310
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (4)
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References (7)
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