Hardware efficient transform designs with cyclic formulation and subexpression sharing

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 2, Issue , 1998, Pages 398-401

  Chang, Tian Sheuan ^a   Jen, Chein Wei ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

FOURIER TRANSFORMS; SYSTOLIC ARRAYS;

DISCRETE FOURIER TRANSFORM (DFT);

ELECTRIC NETWORK SYNTHESIS;

EID: 0031632289     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)