32-bit radiation-hardened computers for space

IEEE Aerospace Conference Proceedings

Volumn 2, Issue , 1998, Pages 241-253

  Nedeau, J ^a   King, D ^a   Lanza, D ^b   Hunt, K ^a   Byington, L ^c  

^a AIR FORCE RESEARCH LABORATORY   (United States)

^b Albuquerque Div   (United States)

^c AEROSPACE CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

MILITARY AVIATION; NASA; RESEARCH LABORATORIES; SPACE APPLICATIONS; SPACE FLIGHT; MICROPROCESSOR CHIPS;

AIR FORCE RESEARCH LABORATORY; COMMERCIAL SATELLITE SYSTEMS; EMERGING TECHNOLOGIES; HERITAGE ARCHITECTURES; REDUCED INSTRUCTION SET COMPUTER (RISC); SINGLE BOARD COMPUTERS; TECHNOLOGY DEVELOPMENT; UNITED STATES AIR FORCE;

SATELLITES; REDUCED INSTRUCTION SET COMPUTING;

ADVANCED TECHNOLOGY INSERTION MODULE (ATIM); IMPROVED SPACE ARCHITECTURE CONCEPT (ISAC); IMPROVED SPACE COMPUTER PROGRAM (ISCP);

EID: 0031631295     PISSN: 1095323X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/AERO.1998.687913     Document Type: Conference Paper

References (3)

1. Gordon, King, et. al., "Technology Transfer of Military Space Microprocessor Development," 34th Space Congress Proceedings, May 1997.
2. Borky, John M., B.K. Singaraju, and Kun: B. Stevens, "An Advanced Spacecraft Avionics Architecture," 1996 Aerospace Applications Conference Proceedings, Vol. 1, pp. 227-242, Feb 1996.
3. Nedeau, King, et. al., "Improved Space Computer Program (ISCP): Very High Throughput Processing for 21th Century Satellites." 1997 IEEE Aerospace Conference Proceedings, Vol. Pp. 263-273, Feb 1997.