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Volumn , Issue , 1998, Pages 243-248
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Four-quadrant one-transistor-synapse for high-density CNN implementations
a a a a |
Author keywords
[No Author keywords available]
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Indexed keywords
CMOS INTEGRATED CIRCUITS;
ELECTRIC LOSSES;
LINEAR INTEGRATED CIRCUITS;
MICROPROCESSOR CHIPS;
PARALLEL PROCESSING SYSTEMS;
TRANSISTORS;
SYNAPSE STRATEGIES;
CELLULAR NEURAL NETWORKS;
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EID: 0031631286
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (22)
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References (10)
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