A video signal processor for MIMD multiprocessing

Proceedings - Design Automation Conference

Volumn , Issue , 1998, Pages 50-55

  Hilgenstock, Jörg ^a   Herrmann, Klaus ^a   Otterstedt, Jan ^a   Niggemeyer, Dirk ^a   Pirsch, Peter ^a  

^a LEIBNIZ UNIVERSITY HANNOVER   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COPROCESSOR; MOTION PICTURE EXPERTS GROUP STANDARDS; VIDEO SIGNAL PROCESSING; ALGORITHMS; CMOS INTEGRATED CIRCUITS; IMAGE CODING; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT MANUFACTURE; MULTIPROCESSING SYSTEMS; REDUCED INSTRUCTION SET COMPUTING; STANDARDS;

ARITHMETIC OPERATIONS; CMOS TECHNOLOGY; COMPUTATION-INTENSIVE ALGORITHMS; HIGH DATA RATE; MULTI PROCESSOR SYSTEMS; PEAK PERFORMANCE; RISC PROCESSORS; STANDARD CELL DESIGN;

REDUCED INSTRUCTION SET COMPUTING; DIGITAL INTEGRATED CIRCUITS;

COPROCESSORS; GIGA ARITHMETIC OPERATIONS PER SECOND (GOPS);

EID: 0031630292     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/277044.277054     Document Type: Conference Paper

References (9)

1. ITU-T Recommendation H.261, Video Codec for audiovisual Services at p x 64 kbits, International Telecommunication Union, March 1993.
2. Draft ITU-T Recommendation H.263, "Video Coding for Low Bit Rate Communication", International Telecommunication Union, December 1995.
3. ISO/IEC JTC1/SC2/WG11 MPEG-90/176 Rev. 2, 1990.
4. ISO/IEC JTC1/SC29/WG11 CD 13818-2, 1994.
5. H.G. Musmann, P. Pirsch, H.-J. Grallert, "Advances in Picture Coding", Proc. IEEE, Vol. 73, No. 4, pp. 523-548, 1985.
6. Y. Okada et al. "An 80 mm2 MPEG2 Audio/Video Decode LSI", IEEE International Solid-State Circuits Conference, Vol. 40, pp.264-265, Feb. 1997.
7. K. Herrmann, M. Seifert, K. Gaedke, H. Jeschke, P. Pirsch, "A RISC Core for a Monolithic Video Signal Processor", in Rabaey, J. et al., Eds., Workshop for VLSI Signal Processing, Oct. 1994, pp. 368-377, IEEE, New York, NY, 1994.
8. B. Konemann, J. Mucha, G. Zwiehoff, "Built-in Logic Block Observation Techniques", Proc. 1979 Intern. Test Conf., Cherry Hill, NJ, USA, October 1979, pp. 37-41.
9. J. Otterstedt, K. Gaedke, K. Herrmann, M. Kuboschek, H.U. Schroeder, A. Werner, " A 16 cm2 Monolithic Multiprocessor System Integrating 9 Video Signal-Processing Elements", IEEE International Solid-State Circuits Conference, Vol. 39, pp. 306-307, Feb. 1996.