Power optimization of ΔΣ analog-to-digital converters based on slewing and partial settling considerations

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 1, Issue , 1998, Pages 360-364

  Naiknaware, Ravindranath ^a   Fiez, Terri ^a  

^a WASHINGTON STATE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INTERFERENCE SUPPRESSION; MATHEMATICAL MODELS; MODULATORS; SPURIOUS SIGNAL NOISE;

CORRELATED DOUBLE SAMPLING (CDS); PARTIAL SETTLING BEHAVIOR; SLEWING BEHAVIOR;

DELTA SIGMA MODULATION;

EID: 0031629861     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)