Evaluation of X-ray lithography using a 0.175 μm (0.245 μm2 cell area) 1 Gb DRAM technology

Digest of Technical Papers - Symposium on VLSI Technology

Volumn , Issue , 1998, Pages 82-83

  Longo, R ^a   Chaloux, S ^a   Chen, A ^a   Krasnoperova, A ^a   Lee, S ^a   Murphy, G ^a   Thomas, A ^a   Wasik, C ^a   Weybright, M ^a   Bronner, G ^a  

^a IBM RESEARCH   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUIT LAYOUT; X RAY LITHOGRAPHY;

MEMORY CELL LAYOUT;

DYNAMIC RANDOM ACCESS STORAGE;

EID: 0031624838     PISSN: 07431562     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)