High speed CMOS buffer for driving large capacitive loads in digital ASICs

Proceedings of the Annual IEEE International ASIC Conference and Exhibit

Volumn , Issue , 1998, Pages 365-368

  Secareanu, Radu M ^a   Friedman, Eby G ^a  

^a UNIVERSITY OF ROCHESTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; BUFFER CIRCUITS; CAPACITANCE; ELECTRIC LOADS; TIMING CIRCUITS;

HIGH SPEED HIGH-DRIVE (HD) BUFFER; TAPERED BUFFER;

CMOS INTEGRATED CIRCUITS;

EID: 0031624572     PISSN: 10630988     EISSN: None     Source Type: None    
DOI: 10.1109/ASIC.1998.723037     Document Type: Conference Paper

References (10)

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