Cost-efficient parallel lattice VLSI architecture for the IFFT/FFT in DMT transceiver technology

ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing - Proceedings

Volumn 6, Issue , 1998, Pages 3517-3520

  Wu, An Yeu ^a   Chan, Tsun Shan ^a  

^a NATIONAL CENTRAL UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ASYMMETRIC DIGITAL SUBSCRIBER LINES (ADSL); COMMUNICATION;

COMPUTATIONAL LOADS; DISCRETE MULTITONE MODULATION; GLOBAL COMMUNICATION; IMPLEMENTATION APPROACH; PARALLEL LATTICE STRUCTURE; STANDARD TRANSMISSION; TRANSCEIVER TECHNOLOGY; VLSI IMPLEMENTATION;

MODULATION;

EID: 0031624396     PISSN: 15206149     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICASSP.1998.679626     Document Type: Conference Paper

References (8)

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